Ambipolar transistors are Double Independent Gate (DIG) FETs with device polarity controllable via the second gate. DIG ambipolar FETs have been reported in many nano-scale emerging technologies [1]-[5], [13]. In FIG. 1, the polarity control operation is shown: the Polarity Gate (PG) set the device polarity while the Conventional Gate (CG) set the on-state in the usual way.
Recently, several works have proved that DIG ambipolar FETs can be employed to implement complex binate functions with a reduced number of transistors [6,7]. In FIG. 2(a), the 2-input XOR complementary gate proposed in [6] is depicted.
Later in [8], a full swing 3 input XOR gate in Complementary Transmission Gate (CTG) style was proposed (FIG. 2(b)). Other complex gates were proposed in [6] to form an efficient library of ambipolar gates. Ambipolar MUX gates were explored in [9] showing remarkable savings with respect to unipolar technology. Despite these gates can be employed to obtain denser and faster circuits, none has been proposed to efficiently implement unate functions in ambipolar technology, missing further optimization opportunities.
Differential Cascade Voltage Switch Logic (DCVSL) is a differential style that provides complementary outputs given true and complementary inputs. Technologies that are efficient for binate-logic intensive circuits, such as ambipolar technologies, get extra benefits from DCVSL style.